The objective of this project is to fully understand the 9’s complement using the 4-bit adder IC-7483. The IC-7483 is a commonly available TTL 4-bit parallel adder chip. It contains four interconnected full adders and a look-ahead carry circuitry for its operation.
The logic symbol of IC-7483 is shown in figure 2. It has two 4-bit inputs X3, X2, X1, X0 and Y3, Y2, Y1, Y0 and the carry input Cin in the LSB stage. The outputs are a 4-bit sum S3, S2, S1, S0 and carry output Cout from the MSB stage. Two or more parallel adder blocks can be connected in a cascade to perform the addition operation on larger binary numbers. The four least significant bits of the number are added in the first adder.
The carry output of this adder is given as the carry input to the second adder, which adds the four most significant bits of the number. The output carries of the second adder is the final carry output.
Must Read BCD Adder Circuit Using IC7483
Project
Circuit Diagram
Components Required
- 7483 Full Adder IC
- 7404 NOT Gate IC
- 3 Terminal Switch (x4)
- LED (x4)
- +5V Power Supply
- Breadboard
- Wires
About Parts of 9’s Complement Circuit
IC-7483 Full Adder (4-Bit Binary Adder)
The IC-7483 is a commonly available TTL 4-bit parallel adder chip. It contains four interconnected full adders; a look-ahead carry circuitry for its operation (CLA = Carry Look-Ahead Adder). The logic symbol of IC7483 is shown in fig 2 and the pin configuration in table 1. It has two 4-bit A3, A2, A1, A0 and B3, B2, B1, B0 and a carry input Cin in the LSB stage. The outputs are a 4-bit sum S3, S2, S1, S0 and a carry output (Cout) from the MSB stage.
Two or more parallel adder blocks can be connected in a cascade to perform the addition operation on a larger binary number. The four LSB of the number is added in the first adder. The carry output of this adder is given as carrying input to the second adder, which adds the four MSB of the number. the output carry of the second adder is the final carry output.
IC-7404 (NOT Gate IC)
The IC-7404 is a logic gate IC. It consists of six NOT gates. We know that the NOT gate is also called an inverter because it does complement of the inputs. When we apply zero or low signal to the input, it gives 1 or high signal as in the output. The pin diagram of the IC-7404 is shown in figure 4.
The general form of Truth Table for NOT gate is:
The truth table consists of input (x) and output as mod of |x̄|.
| Input (x) | Output (y) |
|---|---|
| 0 | 1 |
| 1 | 0 |
Circuit Connection for 9’s Complement Circuit
The circuit connection for this circuit is very easy because few components are used in this circuit. At first, we connect the pins I1, I2, I3 and I4 of the IC-7404 to the common terminals of the 3-terminal switch respectively. Then connect the pin B0, B1, B2, B3 of the IC-7483 to the pin O1, O2, O3, O4 of the IC-7404. Pin Cin is connected to the ground and Cout is set to float for 9’s complement. Then apply +5V VCC across the A1 and A3 pins and ground to the A0 and A3 pins of the IC-7483.
PCB Design
For removing messy wiring and give a clean look, I designed a PCB prototype for this project. It is also helpful for troubleshooting that runs great without any errors. To design this PCB board, I used EasyEDA as it is too easy to use. For ordering PCB for this, I prefer PCBWay.
Gerber file for 9’s Complement Circuit Gerber.
PCB View
Order PCB From PCBWay
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Working Principle of 9’s Complement Circuit
Now to get 9’s complement using a 4-bit full adder i.e., IC-7483 have some specific ways.
- 9’s complement of a 4-bit number (BCD code) “x” is, 1001-x = 9-x; instead of subtracting “x” from 9, we can use the following method by which we can avoid this subtraction.
- The 9’s complement of a BCD code of a number “x” can be expressed as:
9-x = (15-6)-x = (15-x)-6 = x̄-6=(x̄+10)
or, 9-x = [(15-x)+10]-16
- The first part (15-x) is the 1’s complement of x when x is a BCD number i.e. (15-x) produces x̄.
- In the circuit implementation, with the IC-7483 adder circuit, this x̄ can be generated by four single inverters, i.e., 4-bit inverted numbers are x̄3, x̄2, x̄1, x̄0.
- Now in the first case, (x̄-6) = (x̄+10) can be done by the 2’s complement of the 6 which form gives 10.
(6) → 0110 (1’s complement)→ 1001 (Add+1) → 1010 (2’s Complement)
Next, the (10)10 =(1010) can easily be added to the inverter’s output by using a 4-bit full adder IC-7483.
- The subtraction of 16 from the sum output of the full adder can be done very easily by ignoring the (COut ).
- The (Cin) input should be grounded otherwise extra 1 will be added. So carefully grounded the (Cin) i.e., pin 13 for IC-7483 to 0.
- Next, in general, any 4-bit binary number x can be subtracted from another 4-bit number N(N>x), if we use the circuit shown in the diagram. In this circuit, the four inverters will produce (15-x) from the binary number (x).
Due to this inversion, the B input of IC-7483 receives (15-x). The other 4-bit binary number N is applied to the A inputs of IC-7483.
The sum of (15-x), N. and Cin =1 will be.
S = N+(15-x)+1
S = 16+(N-x)
i.e., the output S3, S2, S1, S0 will be (N-x) and the Cout will be 1. If Cout is discarded then we get the difference (N-X) at S3, S2, S1, S0 in the output of IC-7483.
Truth Table for Full Adder
| A | B | CIN | SUM | CARRY (COUT) |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Truth Table for 9’s Complement
| Digits | X3 | X2 | X1 | X0 | S3 | S2 | S1 | S0 |
|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |
| 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 |
| 2 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 |
| 3 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 |
| 4 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 1 |
| 5 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 |
| 6 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |
| 7 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 |
| 8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| 9 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
Example
Precautions & Discussions of 9’s Complement Circuit
- Various resistance should be chosen in the conduction state current through the LEDs. So that it does not exceed the maximum rated current. So carefully choose the safety resistance for LED.
- The experiment has been done by using the level logic where a high voltage i.e. equal to (+Vcc) i.e. =+5V DC is taken as ‘1’ and a low voltage i.e., equal to (GND) = 0V is taken as ‘0’.
- LEDs used for proper current limiting resistance can be used for easy and quick visual identification of the ‘0’ and ‘1’ state. If a LED glows then it is a 1’s state and if it does not glow then it is a ‘0’ state.
- While connecting the +5V DC supply to the IC, special care should be taken. Connection to any wrong pin may damage the IC.
- Carefully connect the (Cin) pin for IC-7483 (4-bit full adder) for 9’s complement; as for 9’s compliment Cin =0 or low voltage level.
- For connecting the inverted output from NOT Gate, IC-7404 to IC-7483 one of 4-bits input, special care should be taken during setting up the wire connection to LSB and MSB bit. So that the output should be in the correct form otherwise it goes wrong.